Opportunity Information: Apply for W911NF 22 S 0006
The QUANTUM COMPUTING in the SOLID STATE with SPIN and SUPERCONDUCTING SYSTEMS (QC-S5) opportunity (Funding Opportunity Number W911NF 22 S 0006) is a U.S. Department of Defense, Department of the Army (Army Research Office, or ARO) solicitation run in collaboration with the Laboratory for Physical Sciences (LPS). It targets research and development that advances gate-based, circuit-model quantum computing specifically in solid-state platforms, with an emphasis on spin qubits (for example, semiconductor quantum dots in SiGe or MOS structures) and superconducting qubits. The program is structured around four topic areas, and every proposed effort is expected to fit squarely within universal, gate-based quantum computing: meaning there must be a credible path to high-quality single-qubit and two-qubit gates, multi-qubit operation, and readout that would support scalable architectures rather than isolated demonstrations.
The four research topics define the technical scope. Topic A, Modular Quantum Gates (ModQ), focuses on ways to distribute quantum information and implement gates in modular or networked arrangements, which can include approaches that make it easier to connect sub-systems or chip-scale modules while still maintaining the requirements of the circuit model. Topic C, Fast control and readout schemes (FastCARS), is aimed at new techniques to speed up qubit control and measurement while maintaining or improving fidelity, a key need for running deeper circuits before errors accumulate. Topic D, Noise in solid-state spin and superconducting systems (NS5), concentrates on understanding, modeling, and mitigating the noise sources that limit performance in these platforms, including noise processes that affect coherence, gate errors, correlated errors, and measurement error. A central expectation for Topics A, C, and D is that proposers will use high fidelity multi-qubit devices to validate and demonstrate their ideas, not just simulations or single-qubit testbeds.
A defining feature of the solicitation is the distinction between topics that require mature, high-fidelity hardware and a topic that is explicitly about pushing beyond standard qubit designs. For Topics A, C, and D, the government is essentially asking teams to start from strong experimental footing: multi-qubit spin or superconducting systems that already demonstrate state-of-the-art low error universal gates and low error readout. These devices can be owned and operated by the proposing team, obtained through collaborations (including collaborations formed under this broad agency announcement), or sourced from a proven qubit foundry that can supply a suitable platform. The point is that the research should be able to stress-test new gate modularity concepts, faster control/readout ideas, and noise characterization/mitigation strategies on hardware that is already credible as a building block for scalable quantum computing.
Topic B, Gates on Advanced qubits with Superior Performance (GASP), is the one area where the program invites newer qubit variants, but with a strict bar: the qubit must already show a clearly superior performance metric compared to leading mainstream gate-based solid-state qubits, and it cannot achieve that advantage by trading away other critical metrics. In other words, it is not enough to claim novelty or potential; there must be demonstrated superiority on something important (for example, longer T1 or T2, better robustness, improved splitting or reduced sensitivity to disorder, improved operating conditions, or other meaningful measures), and that improvement must not come at the expense of other requirements that matter for universal gate-based computing. The deliverable emphasis in Topic B is then to develop high-fidelity multi-qubit gate schemes for these advanced qubits, translating the improved device-level metric into practical, universal, multi-qubit control.
The solicitation is also explicit about what it will not fund, which effectively sets the program boundary around solid-state, gate-model quantum processors rather than the broader quantum information landscape. Proposals centered on atomic and molecular platforms (such as neutral atoms or trapped ions) are out of scope, as are optical photon-based quantum computing approaches. The call also rejects systems that do not have a realistic path to universal single- and two-qubit gates, and it excludes qubit concepts that are still immature in the sense that they have not yet demonstrated a superior performance metric relative to leading solid-state approaches, especially if any claimed advantage comes with unacceptable sacrifices in other key metrics. Work focused on quantum simulators (as opposed to universal gate-based machines), purely computational simulations without strong experimental ties, quantum annealing, and measurement-based quantum computing approaches are also outside the scope, with limited exceptions only in narrow cases such as specific entanglement-generation application areas.
From a teaming and capability standpoint, the opportunity strongly encourages multidisciplinary efforts. The underlying message is that progress in these areas usually requires tight integration of theory and modeling, device physics, materials and fabrication, control engineering, cryogenic measurement, and experimental validation. Competitive teams are therefore expected to combine expertise across simulation and theory (to predict and optimize gates, control pulses, and error mechanisms), fabrication and materials (to produce or access high-quality devices), and experimental implementation (to demonstrate high-fidelity gates, readout, and multi-qubit behavior under realistic conditions). This is consistent with the program’s emphasis on universal control in multi-qubit architectures rather than one-off results.
Administratively, the opportunity was released on January 18, 2022, with a two-step submission timeline: white papers due by 4:00 PM Eastern on July 15, 2022, and full proposals due by 4:00 PM Eastern on September 30, 2022 (with reference to additional details in the solicitation). The funding instruments listed include cooperative agreements, grants, and procurement contracts, reflecting flexibility in how ARO/LPS may structure awards depending on the nature of the work and the level of government involvement. The listing shows an expected number of awards of up to 100 and an award ceiling recorded as 0, which typically signals that funding amounts and project sizes are not stated as a simple cap in the public summary and instead are governed by the BAA’s internal guidance, topic needs, and available funds. The CFDA number associated with the program is 12.431, and eligibility is described broadly as "Others" with clarification in the full announcement.
In practical terms, QC-S5 is a targeted push to accelerate universal, gate-based quantum computing in two of the most prominent solid-state approaches, with an emphasis on hardware-validated advances. It aims to (1) improve how gates and information can be modularized and distributed, (2) create workable gate sets for demonstrably better next-generation qubits, (3) speed up control and measurement without losing fidelity, and (4) identify and reduce the noise processes that currently block scale-up, all while staying grounded in multi-qubit experiments that reflect the realities of building scalable quantum processors.Apply for W911NF 22 S 0006
- The Department of Defense, Dept of the Army -- Materiel Command in the science and technology and other research and development sector is offering a public funding opportunity titled "QUANTUM COMPUTING in the SOLID STATE with SPIN and SUPERCONDUCTING SYSTEMS (QC-S5)" and is now available to receive applicants.
- Interested and eligible applicants and submit their applications by referencing the CFDA number(s): 12.431.
- This funding opportunity was created on Jan 18, 2022.
- Applicants must submit their applications by Sep 30, 2022 White Papers 400 PM Eastern Daylight Savings Time on 15 July 2022 Proposals 400 PM Eastern Daylight Savings Time on 30 September 2022 See Section II. D. 4 for additional information.. (Agency may still review applications by suitable applicants for the remaining/unused allocated funding in 2026.)
- The number of recipients for this funding is limited to 100 candidate(s).
- Eligible applicants include: Others (see text field entitled Additional Information on Eligibility for clarification).
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Frequently Asked Questions (FAQ) - QC-S5 (W911NF 22 S 0006)
What is the QC-S5 funding opportunity?
QC-S5 stands for "Quantum Computing in the Solid State with Spin and Superconducting Systems." It is a U.S. Department of Defense opportunity from the Department of the Army, administered by the Army Research Office (ARO) in collaboration with the Laboratory for Physical Sciences (LPS). The solicitation targets research and development that advances universal, gate-based (circuit-model) quantum computing in solid-state platforms.
What is the Funding Opportunity Number?
The Funding Opportunity Number is W911NF 22 S 0006.
Which quantum computing model does this program focus on?
The program is specifically centered on universal, gate-based, circuit-model quantum computing. Proposed efforts are expected to fit squarely within this model, including a credible path to high-quality single-qubit and two-qubit gates, multi-qubit operation, and readout consistent with scalable architectures.
Which hardware platforms are in scope?
The solicitation targets solid-state platforms, with an emphasis on spin qubits (for example, semiconductor quantum dots in SiGe or MOS structures) and superconducting qubits.
What are the four topic areas in QC-S5?
The program is structured around four topics: Topic A (Modular Quantum Gates, ModQ), Topic B (Gates on Advanced qubits with Superior Performance, GASP), Topic C (Fast control and readout schemes, FastCARS), and Topic D (Noise in solid-state spin and superconducting systems, NS5).
What is Topic A (ModQ) about?
Topic A, Modular Quantum Gates (ModQ), focuses on methods to distribute quantum information and implement gates in modular or networked arrangements. This can include approaches that help connect subsystems or chip-scale modules while maintaining circuit-model requirements.
What is Topic B (GASP) about?
Topic B, Gates on Advanced qubits with Superior Performance (GASP), is focused on qubit variants that go beyond standard designs, but only when they already demonstrate a clearly superior performance metric relative to leading mainstream gate-based solid-state qubits. The emphasis is on developing high-fidelity multi-qubit gate schemes that translate the improved device-level metric into practical universal multi-qubit control.
What is Topic C (FastCARS) about?
Topic C, Fast control and readout schemes (FastCARS), seeks new techniques to speed up qubit control and measurement while maintaining or improving fidelity. This is positioned as a key need to run deeper circuits before errors accumulate.
What is Topic D (NS5) about?
Topic D, Noise in solid-state spin and superconducting systems (NS5), focuses on understanding, modeling, and mitigating noise sources that limit performance. This includes noise processes affecting coherence, gate errors, correlated errors, and measurement error.
Is experimental validation required, or are simulations enough?
For Topics A, C, and D, the solicitation sets an expectation that proposers will validate and demonstrate ideas using high-fidelity multi-qubit devices. The program emphasis is not on simulations or single-qubit testbeds alone.
What level of hardware maturity is expected for Topics A, C, and D?
For Topics A, C, and D, teams are expected to start from strong experimental footing using multi-qubit spin or superconducting systems that already demonstrate state-of-the-art low-error universal gates and low-error readout. The intent is to stress-test new concepts on hardware that is already credible for scalable architectures.
How can teams access the required multi-qubit hardware?
The solicitation indicates that suitable devices can be owned and operated by the proposing team, obtained through collaborations (including collaborations formed under the BAA), or sourced from a proven qubit foundry capable of supplying an appropriate platform.
What is the key requirement for Topic B (GASP) qubits?
The qubit must already show a clearly superior performance metric compared to leading mainstream gate-based solid-state qubits, and the advantage cannot come from trading away other critical metrics required for universal gate-based computing.
Does novelty or "potential" performance qualify a qubit for Topic B?
No. Topic B sets a strict bar: it is not enough to claim novelty or potential. The solicitation calls for demonstrated superiority on an important metric, without unacceptable sacrifices in other key metrics.
What kinds of "superior performance metrics" are implied for Topic B?
The description gives examples such as longer T1 or T2, better robustness, improved splitting, reduced sensitivity to disorder, improved operating conditions, or other meaningful measures, as long as the improvement does not compromise other essential requirements.
What deliverables are emphasized for Topic B?
Topic B emphasizes developing high-fidelity multi-qubit gate schemes for the advanced qubits, converting device-level advantages into practical, universal multi-qubit control.
Which platforms or approaches are explicitly out of scope?
The solicitation indicates that atomic and molecular platforms (such as neutral atoms and trapped ions) are out of scope, as are optical photon-based quantum computing approaches.
Are quantum annealing and quantum simulators supported?
No. The description explicitly excludes work focused on quantum simulators (as opposed to universal gate-based machines) and quantum annealing.
Is measurement-based quantum computing supported?
No. Measurement-based quantum computing approaches are described as outside the scope, with only limited exceptions in narrow cases such as specific entanglement-generation application areas.
Are proposals without a realistic path to universal single- and two-qubit gates allowed?
No. The solicitation excludes systems that do not have a realistic path to universal single- and two-qubit gates.
Does QC-S5 fund immature qubit concepts?
The program excludes qubit concepts that are immature in the sense that they have not yet demonstrated a superior performance metric relative to leading solid-state approaches, particularly when the claimed advantage requires unacceptable sacrifices in other key metrics.
What is the program's overall emphasis across topics?
Across the program, the emphasis is on hardware-validated advances that support scalable, universal gate-based quantum computing in solid-state spin and superconducting systems, rather than isolated demonstrations.
What kinds of teams are encouraged to apply?
The opportunity strongly encourages multidisciplinary efforts integrating theory and modeling, device physics, materials and fabrication, control engineering, cryogenic measurement, and experimental validation.
Why is multidisciplinary teaming emphasized?
The solicitation message is that progress typically requires tight integration of simulation/theory (to predict and optimize gates, control pulses, and error mechanisms), fabrication/materials (to produce or access high-quality devices), and experimental implementation (to demonstrate high-fidelity gates, readout, and multi-qubit behavior under realistic conditions).
When was the opportunity released?
The opportunity was released on January 18, 2022.
What is the submission process and timeline?
The solicitation describes a two-step submission timeline: white papers were due by 4:00 PM Eastern on July 15, 2022, and full proposals were due by 4:00 PM Eastern on September 30, 2022. The description also notes that additional details are provided in the solicitation.
What funding instruments may be used for awards?
The listed funding instruments include cooperative agreements, grants, and procurement contracts, indicating that ARO/LPS may choose an instrument based on the nature of the work and the level of government involvement.
How many awards are expected?
The listing shows an expected number of awards of up to 100.
Is there a stated maximum award amount?
The public summary shows an award ceiling recorded as 0, which is typically used to indicate that a simple public cap is not stated in the summary. The description suggests that funding amounts and project sizes are governed by internal BAA guidance, topic needs, and available funds.
What is the CFDA number associated with this program?
The CFDA number associated with the program is 12.431.
Who is eligible to apply?
Eligibility is described broadly as "Others," with clarification in the full announcement.
What does "universal, gate-based" mean in the context of this solicitation?
In this solicitation, it means the work must support credible high-quality single-qubit and two-qubit gates, multi-qubit operation, and readout in a way that supports scalable architectures, not just isolated or one-off demonstrations.
What is meant by "modular" or "networked" arrangements in Topic A?
Based on the description, modular/networked arrangements refer to approaches that distribute quantum information and implement gates in ways that connect subsystems or chip-scale modules, while still meeting circuit-model requirements.
What types of noise are relevant to Topic D?
Topic D includes noise processes that affect coherence, gate errors, correlated errors, and measurement error in solid-state spin and superconducting systems.
What is the intended impact of Topic C's "fast control and readout" focus?
The stated need is to speed up qubit control and measurement while maintaining or improving fidelity, enabling deeper circuits before accumulated errors become limiting.
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